mipscopaccess.h File Reference

#include <tamtypes.h>

Go to the source code of this file.

Macros
#define	COP0_REG_Index   0
#define	COP0_REG_Random   1
#define	COP0_REG_EntryLo0   2
#define	COP0_REG_EntryLo1   3
#define	COP0_REG_Context   4
#define	COP0_REG_PageMask   5
#define	COP0_REG_Wired   6
#define	COP0_REG_BadVAddr   8
#define	COP0_REG_Count   9
#define	COP0_REG_EntryHi   10
#define	COP0_REG_Compare   11
#define	COP0_REG_Status   12
#define	COP0_REG_Cause   13
#define	COP0_REG_EPC   14
#define	COP0_REG_PRId   15
#define	COP0_REG_Config   16
#define	COP0_REG_BadPAddr   23
#define	COP0_REG_Debug   24
#define	COP0_REG_Perf   25
#define	COP0_REG_TagLo   28
#define	COP0_REG_TagHi   29
#define	COP0_REG_ErrorPC   30
#define	MIPSCOPACCESS_STR(x)
#define	MIPSCOPACCESS_XSTR(x)
#define	get_mips_cop_reg(cop, idx)
#define	set_mips_cop_reg(cop, idx, val)

Detailed Description

MIPS COP coprocessor access

Definition in file mipscopaccess.h.

Macro Definition Documentation

COP0_REG_BadPAddr

#define COP0_REG_BadPAddr   23

Bad Physical Address (purpose: Exception)

Definition at line 45 of file mipscopaccess.h.

COP0_REG_BadVAddr

#define COP0_REG_BadVAddr   8

Bad virtual address (purpose: Exception)

Definition at line 27 of file mipscopaccess.h.

COP0_REG_Cause

#define COP0_REG_Cause   13

Cause of the last exception taken (purpose: Exception)

Definition at line 37 of file mipscopaccess.h.

COP0_REG_Compare

#define COP0_REG_Compare   11

Timer compare (purpose: Exception)

Definition at line 33 of file mipscopaccess.h.

COP0_REG_Config

#define COP0_REG_Config   16

Configuration Register (purpose: MMU)

Definition at line 43 of file mipscopaccess.h.

COP0_REG_Context

#define COP0_REG_Context   4

Pointer to kernel virtual PTE table (purpose: Exception)

Definition at line 21 of file mipscopaccess.h.

COP0_REG_Count

#define COP0_REG_Count   9

Timer compare (purpose: Exception)

Definition at line 29 of file mipscopaccess.h.

COP0_REG_Debug

#define COP0_REG_Debug   24

This is used for Debug function (purpose: Debug)

Definition at line 47 of file mipscopaccess.h.

COP0_REG_EntryHi

#define COP0_REG_EntryHi   10

High half of TLB entry(Virtual page number and ASID) (purpose: MMU)

Definition at line 31 of file mipscopaccess.h.

COP0_REG_EntryLo0

#define COP0_REG_EntryLo0   2

Low half of TLB entry for even PFN (Physical page number) (purpose: MMU)

Definition at line 17 of file mipscopaccess.h.

COP0_REG_EntryLo1

#define COP0_REG_EntryLo1   3

Low half of TLB entry for odd PFN (Physical page number) (purpose: MMU)

Definition at line 19 of file mipscopaccess.h.

COP0_REG_EPC

#define COP0_REG_EPC   14

Exception Program Counter (purpose: Exception)

Definition at line 39 of file mipscopaccess.h.

COP0_REG_ErrorPC

#define COP0_REG_ErrorPC   30

Error Exception Program Counter (purpose: Exception)

Definition at line 55 of file mipscopaccess.h.

COP0_REG_Index

#define COP0_REG_Index   0

Programmable register to select TLB entry for reading or writing (purpose: MMU)

Definition at line 13 of file mipscopaccess.h.

COP0_REG_PageMask

#define COP0_REG_PageMask   5

Mask that sets the TLB page size (purpose: MMU)

Definition at line 23 of file mipscopaccess.h.

COP0_REG_Perf

#define COP0_REG_Perf   25

Performance Counter and Control Register (purpose: Exception)

Definition at line 49 of file mipscopaccess.h.

COP0_REG_PRId

#define COP0_REG_PRId   15

Processor Revision Identifier (purpose: MMU)

Definition at line 41 of file mipscopaccess.h.

COP0_REG_Random

#define COP0_REG_Random   1

Pseudo-random counter for TLB replacement (purpose: MMU)

Definition at line 15 of file mipscopaccess.h.

COP0_REG_Status

#define COP0_REG_Status   12

Processor Status Register (purpose: Exception)

Definition at line 35 of file mipscopaccess.h.

COP0_REG_TagHi

#define COP0_REG_TagHi   29

Cache Tag register(high bits) (purpose: MMU)

Definition at line 53 of file mipscopaccess.h.

COP0_REG_TagLo

#define COP0_REG_TagLo   28

Cache Tag register(low bits) (purpose: MMU)

Definition at line 51 of file mipscopaccess.h.

COP0_REG_Wired

#define COP0_REG_Wired   6

Number of wired TLB entries (purpose: MMU)

Definition at line 25 of file mipscopaccess.h.

get_mips_cop_reg

#define get_mips_cop_reg	(		cop,
			idx )

Value:

({ \
    u32 __val; \
    __asm__ __volatile__("mfc" MIPSCOPACCESS_XSTR(cop) "\t%0, $" MIPSCOPACCESS_XSTR(idx) "\n" : "=r"(__val)); \
    __val; \
})

Definition at line 77 of file mipscopaccess.h.

MIPSCOPACCESS_STR

#define MIPSCOPACCESS_STR

(

x

)

Value:

#x

Definition at line 74 of file mipscopaccess.h.

MIPSCOPACCESS_XSTR

#define MIPSCOPACCESS_XSTR

(

x

)

Value:

MIPSCOPACCESS_STR(x)

Definition at line 75 of file mipscopaccess.h.

set_mips_cop_reg

#define set_mips_cop_reg	(		cop,
			idx,
			val )

Value:

__asm__ __volatile__("mtc" MIPSCOPACCESS_XSTR(cop) "\t%0, $" MIPSCOPACCESS_XSTR(idx) "\n" :: "r"((u32)(val)))

Definition at line 84 of file mipscopaccess.h.