- Generated by
1.18.0
|
sdk-core v2026.11.05
PS2 SDK - core tier (build-critical EE/IOP modules)
|
#include <tamtypes.h>Go to the source code of this file.
Macros | |
| #define | A_IOP_SIF0_HANDLER ((vu32 *)(0x000003C0)) |
| #define | A_IOP_SIF1_HANDLER ((vu32 *)(0x000003D0)) |
| #define | A_IOP_SIF2_HANDLER ((vu32 *)(0x000003E0)) |
| #define | M_reg8(___base, ___reg_num) |
| #define | R_CDVD_N_CMD M_reg8(A_CDVD_REG_BASE, 0x04) |
| #define | R_CDVD_N_CMD_STATUS M_reg8(A_CDVD_REG_BASE, 0x05) |
| #define | R_CDVD_N_CMD_PARAM_FIFO M_reg8(A_CDVD_REG_BASE, 0x05) |
| #define | R_CDVD_LAST_ERROR M_reg8(A_CDVD_REG_BASE, 0x06) |
| #define | R_CDVD_REG07 M_reg8(A_CDVD_REG_BASE, 0x07) |
| #define | R_CDVD_TRAY_STATUS M_reg8(A_CDVD_REG_BASE, 0x0A) |
| #define | CDVD_TRAY_STAT_OPEN (1 << 0) |
| #define | R_CDVD_DISK_TYPE M_reg8(A_CDVD_REG_BASE, 0x0F) |
| #define | R_CDVD_S_CMD M_reg8(A_CDVD_REG_BASE, 0x16) |
| #define | R_CDVD_S_STATUS M_reg8(A_CDVD_REG_BASE, 0x17) |
| #define | R_CDVD_S_PARAM_FIFO M_reg8(A_CDVD_REG_BASE, 0x17) |
| #define | CDVD_S_STAT_RFIFO_EMPTY (1 << 6) |
| #define | CDVD_S_STAT_BUSY (1 << 7) |
| #define | R_CDVD_S_RES_FIFO M_reg8(A_CDVD_REG_BASE, 0x18) |
| #define | R_CDVD_KEY_DATA0 M_reg8(A_CDVD_REG_BASE, 0x20) |
| #define | R_CDVD_KEY_DATA1 M_reg8(A_CDVD_REG_BASE, 0x21) |
| #define | R_CDVD_KEY_DATA2 M_reg8(A_CDVD_REG_BASE, 0x22) |
| #define | R_CDVD_KEY_DATA3 M_reg8(A_CDVD_REG_BASE, 0x23) |
| #define | R_CDVD_KEY_DATA4 M_reg8(A_CDVD_REG_BASE, 0x24) |
| #define | R_CDVD_KEY_DATA5 M_reg8(A_CDVD_REG_BASE, 0x28) |
| #define | R_CDVD_KEY_DATA6 M_reg8(A_CDVD_REG_BASE, 0x29) |
| #define | R_CDVD_KEY_DATA7 M_reg8(A_CDVD_REG_BASE, 0x2A) |
| #define | R_CDVD_KEY_DATA8 M_reg8(A_CDVD_REG_BASE, 0x2B) |
| #define | R_CDVD_KEY_DATA9 M_reg8(A_CDVD_REG_BASE, 0x2C) |
| #define | R_CDVD_KEY_DATAA M_reg8(A_CDVD_REG_BASE, 0x30) |
| #define | R_CDVD_KEY_DATAB M_reg8(A_CDVD_REG_BASE, 0x31) |
| #define | R_CDVD_KEY_DATAC M_reg8(A_CDVD_REG_BASE, 0x32) |
| #define | R_CDVD_KEY_DATAD M_reg8(A_CDVD_REG_BASE, 0x33) |
| #define | R_CDVD_KEY_DATAE M_reg8(A_CDVD_REG_BASE, 0x34) |
| #define | R_CDVD_KEY_FLAGS M_reg8(A_CDVD_REG_BASE, 0x38) |
| #define | R_CDVD_KEY_XOR M_reg8(A_CDVD_REG_BASE, 0x39) |
| #define | R_CDVD_DEC_CTRL M_reg8(A_CDVD_REG_BASE, 0x3A) |
| #define | CDVD_DEC_XOR_EN (1 << 0) |
| #define | CDVD_DEC_ROTL_EN (1 << 1) |
| #define | CDVD_DEC_UNK_EN (1 << 2) |
| #define | CDVD_DEC_SWAP_EN (1 << 3) |
| #define | A_IOP_IRQ_CTRL 0xBF801450 |
| #define | A_IOP_REG_1454 0xBF801454 |
| #define | A_PS1_1F801018 0x1F801018 |
| #define | A_PS1_1F801020 0x1F801020 |
| #define | A_PS1_SIO0_DATA 0x1F801040 |
| #define | A_PS1_SIO0_STAT 0x1F801044 |
| #define | A_PS1_SIO0_MODE 0x1F801048 |
| #define | A_PS1_SIO0_CTRL 0x1F80104A |
| #define | A_PS1_SIO0_BAUD 0x1F80104E |
| #define | A_PS1_SIO1_DATA 0x1F801050 |
| #define | A_PS1_SIO1_STAT 0x1F801054 |
| #define | A_PS1_SIO1_MODE 0x1F801058 |
| #define | A_PS1_SIO1_CTRL 0x1F80105A |
| #define | A_PS1_SIO1_BAUD 0x1F80105E |
| #define | A_PS1_RAM_SIZE 0x1F801060 |
| #define | A_IOP_I_STAT 0xBF801070 |
| #define | A_IOP_I_MASK 0xBF801074 |
| #define | A_IOP_IREG_1078 0xBF801078 |
| #define | A_IOP_IREG_107C 0xBF80107C |
| #define | A_IOP_D0_MADR 0xBF801080 |
| #define | A_IOP_D0_BCR 0xBF801084 |
| #define | A_IOP_D0_CHCR 0xBF801088 |
| #define | A_IOP_D1_MADR 0xBF801090 |
| #define | A_IOP_D1_BCR 0xBF801094 |
| #define | A_IOP_D1_CHCR 0xBF801098 |
| #define | A_IOP_D2_MADR 0xBF8010A0 |
| #define | A_IOP_D2_BCR 0xBF8010A4 |
| #define | A_IOP_D2_CHCR 0xBF8010A8 |
| #define | A_IOP_D3_MADR 0xBF8010B0 |
| #define | A_IOP_D3_BCR 0xBF8010B4 |
| #define | A_IOP_D3_CHCR 0xBF8010B8 |
| #define | A_IOP_D4_MADR 0xBF8010C0 |
| #define | A_IOP_D4_BCR 0xBF8010C4 |
| #define | A_IOP_D4_CHCR 0xBF8010C8 |
| #define | A_IOP_D4_TADR 0xBF8010CC |
| #define | A_IOP_D5_MADR 0xBF8010D0 |
| #define | A_IOP_D5_BCR 0xBF8010D4 |
| #define | A_IOP_D5_CHCR 0xBF8010D8 |
| #define | A_IOP_D6_MADR 0xBF8010E0 |
| #define | A_IOP_D6_BCR 0xBF8010E4 |
| #define | A_IOP_D6_CHCR 0xBF8010E8 |
| #define | A_IOP_SIF_1450 0xBF801450 |
| #define | A_IOP_SIF_1454 0xBF801454 |
| #define | A_IOP_BF80146E 0xBF80146E |
| #define | A_IOP_BF801470 0xBF801470 |
| #define | A_IOP_BF801472 0xBF801472 |
| #define | A_IOP_D7_MADR 0xBF801500 |
| #define | A_IOP_D7_BCR 0xBF801504 |
| #define | A_IOP_D7_CHCR 0xBF801508 |
| #define | A_IOP_D8_MADR 0xBF801510 |
| #define | A_IOP_D8_BCR 0xBF801514 |
| #define | A_IOP_D8_CHCR 0xBF801518 |
| #define | A_IOP_D9_MADR 0xBF801520 |
| #define | A_IOP_D9_BCR 0xBF801524 |
| #define | A_IOP_D9_CHCR 0xBF801528 |
| #define | A_IOP_D9_TADR 0xBF80152C |
| #define | A_IOP_D10_MADR 0xBF801530 |
| #define | A_IOP_D10_BCR 0xBF801534 |
| #define | A_IOP_D10_CHCR 0xBF801538 |
| #define | A_IOP_D11_MADR 0xBF801540 |
| #define | A_IOP_D11_BCR 0xBF801544 |
| #define | A_IOP_D11_CHCR 0xBF801548 |
| #define | A_IOP_D12_MADR 0xBF801550 |
| #define | A_IOP_D12_BCR 0xBF801554 |
| #define | A_IOP_D12_CHCR 0xBF801558 |
| #define | A_IOP_DMAC_1560 0xBF801560 |
| #define | A_IOP_DMAC_1564 0xBF801564 |
| #define | A_IOP_DMAC_1568 0xBF801568 |
| #define | A_IOP_DPCR 0xBF8010F0 |
| #define | A_IOP_DPCR2 0xBF801570 |
| #define | A_IOP_DPCR3 0xBF8015F0 |
| #define | A_IOP_DICR 0xBF8010F4 |
| #define | A_IOP_DICR2 0xBF801574 |
| #define | A_IOP_DICR3 0xBF80157C |
| #define | A_IOP_DMAC_1578 0xBF801578 |
| #define | A_PS1_CD_REG0 0x1F801800 |
| #define | A_PS1_CD_REG1 0x1F801801 |
| #define | A_PS1_CD_REG2 0x1F801802 |
| #define | A_PS1_CD_REG3 0x1F801803 |
| #define | A_IOP_GPU_DATA 0x1F801810 |
| #define | A_IOP_GPU_CTRL 0x1F801814 |
| #define | A_IOP_SPU1_BASE 0x1F801C00 |
| #define | A_IOP_UNK_2070 0xBF802070 |
| #define | A_IOP_BF803200 0xBF803200 |
| #define | A_IOP_BF803204 0xBF803204 |
| #define | A_IOP_BF803218 0xBF803218 |
| #define | A_IOP_BF808400 0xBF808400 |
| #define | A_IOP_BF808414 0xBF808414 |
| #define | A_IOP_BF80844C 0xBF80844C |
| #define | A_IOP_BF808420 0xBF808420 |
| #define | A_IOP_BF808428 0xBF808428 |
| #define | A_IOP_BF808430 0xBF808430 |
| #define | A_IOP_BF80847C 0xBF80847C |
| #define | A_IOP_SBUS_REG_BASE 0xBD000000 |
| #define | R_IOP_IRQ_CTRL ((vu32 *)(A_IOP_IRQ_CTRL)) |
| #define | R_IOP_REG_1454 ((vu32 *)(A_IOP_REG_1454)) |
| #define | R_PS1_SIO0_DATA ((vu16 *)(A_PS1_SIO0_DATA)) |
| #define | R_PS1_SIO0_STAT ((vu16 *)(A_PS1_SIO0_STAT)) |
| #define | R_PS1_SIO0_MODE ((vu16 *)(A_PS1_SIO0_MODE)) |
| #define | R_PS1_SIO0_CTRL ((vu16 *)(A_PS1_SIO0_CTRL)) |
| #define | R_PS1_SIO0_BAUD ((vu16 *)(A_PS1_SIO0_BAUD)) |
| #define | R_PS1_SIO1_DATA ((vu16 *)(A_PS1_SIO1_DATA)) |
| #define | R_PS1_SIO1_STAT ((vu16 *)(A_PS1_SIO1_STAT)) |
| #define | R_PS1_SIO1_MODE ((vu16 *)(A_PS1_SIO1_MODE)) |
| #define | R_PS1_SIO1_CTRL ((vu16 *)(A_PS1_SIO1_CTRL)) |
| #define | R_PS1_SIO1_BAUD ((vu16 *)(A_PS1_SIO1_BAUD)) |
| #define | R_PS1_RAM_SIZE ((vu32 *)(A_PS1_RAM_SIZE)) |
| #define | R_IOP_I_STAT ((vu32 *)(A_IOP_I_STAT)) |
| #define | R_IOP_I_MASK ((vu32 *)(A_IOP_I_MASK)) |
| #define | R_IOP_IREG_1078 ((vu32 *)(A_IOP_IREG_1078)) |
| #define | R_IOP_IREG_107C ((vu32 *)(A_IOP_IREG_107C)) |
| #define | R_IOP_D0_MADR ((vu32 *)(A_IOP_D0_MADR)) |
| #define | R_IOP_D0_BCR ((vu32 *)(A_IOP_D0_BCR)) |
| #define | R_IOP_D0_CHCR ((vu32 *)(A_IOP_D0_CHCR)) |
| #define | R_IOP_D1_MADR ((vu32 *)(A_IOP_D1_MADR)) |
| #define | R_IOP_D1_BCR ((vu32 *)(A_IOP_D1_BCR)) |
| #define | R_IOP_D1_CHCR ((vu32 *)(A_IOP_D1_CHCR)) |
| #define | R_IOP_D2_MADR ((vu32 *)(A_IOP_D2_MADR)) |
| #define | R_IOP_D2_BCR ((vu32 *)(A_IOP_D2_BCR)) |
| #define | R_IOP_D2_BCR_BS ((vu16 *)(A_IOP_D2_BCR + 0x00)) |
| #define | R_IOP_D2_BCR_BC ((vu16 *)(A_IOP_D2_BCR + 0x02)) |
| #define | R_IOP_D2_CHCR ((vu32 *)(A_IOP_D2_CHCR)) |
| #define | R_IOP_D3_MADR ((vu32 *)(A_IOP_D3_MADR)) |
| #define | R_IOP_D3_BCR ((vu32 *)(A_IOP_D3_BCR)) |
| #define | R_IOP_D3_CHCR ((vu32 *)(A_IOP_D3_CHCR)) |
| #define | R_IOP_D4_MADR ((vu32 *)(A_IOP_D4_MADR)) |
| #define | R_IOP_D4_BCR ((vu32 *)(A_IOP_D4_BCR)) |
| #define | R_IOP_D4_CHCR ((vu32 *)(A_IOP_D4_CHCR)) |
| #define | R_IOP_D4_TADR ((vu32 *)(A_IOP_D4_TADR)) |
| #define | R_IOP_D5_MADR ((vu32 *)(A_IOP_D5_MADR)) |
| #define | R_IOP_D5_BCR ((vu32 *)(A_IOP_D5_BCR)) |
| #define | R_IOP_D5_CHCR ((vu32 *)(A_IOP_D5_CHCR)) |
| #define | R_IOP_D6_MADR ((vu32 *)(A_IOP_D6_MADR)) |
| #define | R_IOP_D6_BCR ((vu32 *)(A_IOP_D6_BCR)) |
| #define | R_IOP_D6_CHCR ((vu32 *)(A_IOP_D6_CHCR)) |
| #define | R_IOP_D7_MADR ((vu32 *)(A_IOP_D7_MADR)) |
| #define | R_IOP_D7_BCR ((vu32 *)(A_IOP_D7_BCR)) |
| #define | R_IOP_D7_CHCR ((vu32 *)(A_IOP_D7_CHCR)) |
| #define | R_IOP_D8_MADR ((vu32 *)(A_IOP_D8_MADR)) |
| #define | R_IOP_D8_BCR ((vu32 *)(A_IOP_D8_BCR)) |
| #define | R_IOP_D8_CHCR ((vu32 *)(A_IOP_D8_CHCR)) |
| #define | R_IOP_D9_MADR ((vu32 *)(A_IOP_D9_MADR)) |
| #define | R_IOP_D9_BCR ((vu32 *)(A_IOP_D9_BCR)) |
| #define | R_IOP_D9_CHCR ((vu32 *)(A_IOP_D9_CHCR)) |
| #define | R_IOP_D9_TADR ((vu32 *)(A_IOP_D9_TADR)) |
| #define | R_IOP_D10_MADR ((vu32 *)(A_IOP_D10_MADR)) |
| #define | R_IOP_D10_BCR ((vu32 *)(A_IOP_D10_BCR)) |
| #define | R_IOP_D10_CHCR ((vu32 *)(A_IOP_D10_CHCR)) |
| #define | R_IOP_D11_MADR ((vu32 *)(A_IOP_D11_MADR)) |
| #define | R_IOP_D11_BCR ((vu32 *)(A_IOP_D11_BCR)) |
| #define | R_IOP_D11_CHCR ((vu32 *)(A_IOP_D11_CHCR)) |
| #define | R_IOP_D12_MADR ((vu32 *)(A_IOP_D12_MADR)) |
| #define | R_IOP_D12_BCR ((vu32 *)(A_IOP_D12_BCR)) |
| #define | R_IOP_D12_CHCR ((vu32 *)(A_IOP_D12_CHCR)) |
| #define | R_IOP_DMAC_1560 ((vu32 *)(A_IOP_DMAC_1560)) |
| #define | R_IOP_DMAC_1564 ((vu32 *)(A_IOP_DMAC_1564)) |
| #define | R_IOP_DMAC_1568 ((vu32 *)(A_IOP_DMAC_1568)) |
| #define | R_IOP_DPCR ((vu32 *)(A_IOP_DPCR)) |
| #define | R_IOP_DPCR2 ((vu32 *)(A_IOP_DPCR2)) |
| #define | R_IOP_DPCR3 ((vu32 *)(A_IOP_DPCR3)) |
| #define | R_IOP_DICR ((vu32 *)(A_IOP_DICR)) |
| #define | R_IOP_DICR2 ((vu32 *)(A_IOP_DICR2)) |
| #define | R_IOP_DICR3 ((vu32 *)(A_IOP_DICR3)) |
| #define | R_IOP_DMAC_1578 ((vu32 *)(A_IOP_DMAC_1578)) |
| #define | R_IOP_SIF_1450 ((vu32 *)(A_IOP_SIF_1450)) |
| #define | R_IOP_SIF_1454 ((vu32 *)(A_IOP_SIF_1454)) |
| #define | R_PS1_CD_REG0 ((vu8 *)(A_PS1_CD_REG0)) |
| #define | R_PS1_CD_REG1 ((vu8 *)(A_PS1_CD_REG1)) |
| #define | R_PS1_CD_REG2 ((vu8 *)(A_PS1_CD_REG2)) |
| #define | R_PS1_CD_REG3 ((vu8 *)(A_PS1_CD_REG3)) |
| #define | R_IOP_GPU_DATA ((vu32 *)(A_IOP_GPU_DATA)) |
| #define | R_IOP_GPU_CTRL ((vu32 *)(A_IOP_GPU_CTRL)) |
| #define | R_IOP_UNK_2070 ((vu32 *)(A_IOP_UNK_2070)) |
| #define | R_IOP_SBUS_REG_BASE ((vu32 *)(A_IOP_SBUS_REG_BASE)) |
| #define | R_IOP_BF80146E ((vu8 *)(A_IOP_BF80146E)) |
| #define | R_IOP_BF801470 ((vu16 *)(A_IOP_BF801470)) |
| #define | R_IOP_BF801472 ((vu16 *)(A_IOP_BF801472)) |
| #define | R_IOP_BF803200 ((vu8 *)(A_IOP_BF803200)) |
| #define | R_IOP_BF803204 ((vu8 *)(A_IOP_BF803204)) |
| #define | R_IOP_BF803218 ((vu8 *)(A_IOP_BF803218)) |
| #define | R_IOP_BF808400 ((vu32 *)(A_IOP_BF808400)) |
| #define | R_IOP_BF808414 ((vu32 *)(A_IOP_BF808414)) |
| #define | R_IOP_BF80844C ((vu32 *)(A_IOP_BF80844C)) |
| #define | R_IOP_BF808420 ((vu32 *)(A_IOP_BF808420)) |
| #define | R_IOP_BF808428 ((vu32 *)(A_IOP_BF808428)) |
| #define | R_IOP_BF808430 ((vu32 *)(A_IOP_BF808430)) |
| #define | R_IOP_BF80847C ((vu32 *)(A_IOP_BF80847C)) |
| #define | IOP_CHCR_30 (1 << 30) |
| #define | IOP_CHCR_TR (1 << 24) |
| #define | IOP_CHCR_LI (1 << 10) |
| #define | IOP_CHCR_CO (1 << 9) |
| #define | IOP_CHCR_08 (1 << 8) |
| #define | IOP_CHCR_DR (1 << 0) |
| #define | IOP_TO_MEM 0 |
| #define | IOP_FROM_MEM 1 |
| #define | IOP_I_STAT_VB (1 << 0) |
| #define | IOP_I_STAT_SBUS (1 << 1) |
| #define | GM_IF ((vu32 *)0x1F801450) |
| #define | GM_IOP_TYPE (0x80000000) |
| #define | IOP_CPU_TYPE (*GM_IF & GM_IOP_TYPE) |
| #define | IOP_TYPE_MIPSR3000 0 |
| #define | IOP_TYPE_POWERPC 1 |
IOP register definitions.
Definition in file iop_regs.h.
| #define A_IOP_BF80146E 0xBF80146E |
Definition at line 196 of file iop_regs.h.
| #define A_IOP_BF801470 0xBF801470 |
Definition at line 197 of file iop_regs.h.
| #define A_IOP_BF801472 0xBF801472 |
Definition at line 198 of file iop_regs.h.
| #define A_IOP_BF803200 0xBF803200 |
Definition at line 252 of file iop_regs.h.
| #define A_IOP_BF803204 0xBF803204 |
Definition at line 253 of file iop_regs.h.
| #define A_IOP_BF803218 0xBF803218 |
Definition at line 254 of file iop_regs.h.
| #define A_IOP_BF808400 0xBF808400 |
Definition at line 255 of file iop_regs.h.
| #define A_IOP_BF808414 0xBF808414 |
Definition at line 256 of file iop_regs.h.
| #define A_IOP_BF808420 0xBF808420 |
Definition at line 258 of file iop_regs.h.
| #define A_IOP_BF808428 0xBF808428 |
Definition at line 259 of file iop_regs.h.
| #define A_IOP_BF808430 0xBF808430 |
Definition at line 260 of file iop_regs.h.
| #define A_IOP_BF80844C 0xBF80844C |
Definition at line 257 of file iop_regs.h.
| #define A_IOP_BF80847C 0xBF80847C |
Definition at line 261 of file iop_regs.h.
| #define A_IOP_D0_BCR 0xBF801084 |
Definition at line 165 of file iop_regs.h.
| #define A_IOP_D0_CHCR 0xBF801088 |
Definition at line 166 of file iop_regs.h.
| #define A_IOP_D0_MADR 0xBF801080 |
Definition at line 164 of file iop_regs.h.
| #define A_IOP_D10_BCR 0xBF801534 |
Definition at line 214 of file iop_regs.h.
| #define A_IOP_D10_CHCR 0xBF801538 |
Definition at line 215 of file iop_regs.h.
| #define A_IOP_D10_MADR 0xBF801530 |
Definition at line 213 of file iop_regs.h.
| #define A_IOP_D11_BCR 0xBF801544 |
Definition at line 218 of file iop_regs.h.
| #define A_IOP_D11_CHCR 0xBF801548 |
Definition at line 219 of file iop_regs.h.
| #define A_IOP_D11_MADR 0xBF801540 |
Definition at line 217 of file iop_regs.h.
| #define A_IOP_D12_BCR 0xBF801554 |
Definition at line 222 of file iop_regs.h.
| #define A_IOP_D12_CHCR 0xBF801558 |
Definition at line 223 of file iop_regs.h.
| #define A_IOP_D12_MADR 0xBF801550 |
Definition at line 221 of file iop_regs.h.
| #define A_IOP_D1_BCR 0xBF801094 |
Definition at line 169 of file iop_regs.h.
| #define A_IOP_D1_CHCR 0xBF801098 |
Definition at line 170 of file iop_regs.h.
| #define A_IOP_D1_MADR 0xBF801090 |
Definition at line 168 of file iop_regs.h.
| #define A_IOP_D2_BCR 0xBF8010A4 |
Definition at line 173 of file iop_regs.h.
| #define A_IOP_D2_CHCR 0xBF8010A8 |
Definition at line 174 of file iop_regs.h.
| #define A_IOP_D2_MADR 0xBF8010A0 |
Definition at line 172 of file iop_regs.h.
| #define A_IOP_D3_BCR 0xBF8010B4 |
Definition at line 177 of file iop_regs.h.
| #define A_IOP_D3_CHCR 0xBF8010B8 |
Definition at line 178 of file iop_regs.h.
| #define A_IOP_D3_MADR 0xBF8010B0 |
Definition at line 176 of file iop_regs.h.
| #define A_IOP_D4_BCR 0xBF8010C4 |
Definition at line 181 of file iop_regs.h.
| #define A_IOP_D4_CHCR 0xBF8010C8 |
Definition at line 182 of file iop_regs.h.
| #define A_IOP_D4_MADR 0xBF8010C0 |
Definition at line 180 of file iop_regs.h.
| #define A_IOP_D4_TADR 0xBF8010CC |
Definition at line 183 of file iop_regs.h.
| #define A_IOP_D5_BCR 0xBF8010D4 |
Definition at line 186 of file iop_regs.h.
| #define A_IOP_D5_CHCR 0xBF8010D8 |
Definition at line 187 of file iop_regs.h.
| #define A_IOP_D5_MADR 0xBF8010D0 |
Definition at line 185 of file iop_regs.h.
| #define A_IOP_D6_BCR 0xBF8010E4 |
Definition at line 190 of file iop_regs.h.
| #define A_IOP_D6_CHCR 0xBF8010E8 |
Definition at line 191 of file iop_regs.h.
| #define A_IOP_D6_MADR 0xBF8010E0 |
Definition at line 189 of file iop_regs.h.
| #define A_IOP_D7_BCR 0xBF801504 |
Definition at line 201 of file iop_regs.h.
| #define A_IOP_D7_CHCR 0xBF801508 |
Definition at line 202 of file iop_regs.h.
| #define A_IOP_D7_MADR 0xBF801500 |
Definition at line 200 of file iop_regs.h.
| #define A_IOP_D8_BCR 0xBF801514 |
Definition at line 205 of file iop_regs.h.
| #define A_IOP_D8_CHCR 0xBF801518 |
Definition at line 206 of file iop_regs.h.
| #define A_IOP_D8_MADR 0xBF801510 |
Definition at line 204 of file iop_regs.h.
| #define A_IOP_D9_BCR 0xBF801524 |
Definition at line 209 of file iop_regs.h.
| #define A_IOP_D9_CHCR 0xBF801528 |
Definition at line 210 of file iop_regs.h.
| #define A_IOP_D9_MADR 0xBF801520 |
Definition at line 208 of file iop_regs.h.
| #define A_IOP_D9_TADR 0xBF80152C |
Definition at line 211 of file iop_regs.h.
| #define A_IOP_DICR 0xBF8010F4 |
Definition at line 233 of file iop_regs.h.
| #define A_IOP_DICR2 0xBF801574 |
Definition at line 234 of file iop_regs.h.
| #define A_IOP_DICR3 0xBF80157C |
Definition at line 235 of file iop_regs.h.
| #define A_IOP_DMAC_1560 0xBF801560 |
Definition at line 225 of file iop_regs.h.
| #define A_IOP_DMAC_1564 0xBF801564 |
Definition at line 226 of file iop_regs.h.
| #define A_IOP_DMAC_1568 0xBF801568 |
Definition at line 227 of file iop_regs.h.
| #define A_IOP_DMAC_1578 0xBF801578 |
Definition at line 237 of file iop_regs.h.
| #define A_IOP_DPCR 0xBF8010F0 |
Definition at line 229 of file iop_regs.h.
| #define A_IOP_DPCR2 0xBF801570 |
Definition at line 230 of file iop_regs.h.
| #define A_IOP_DPCR3 0xBF8015F0 |
Definition at line 231 of file iop_regs.h.
| #define A_IOP_GPU_CTRL 0x1F801814 |
Definition at line 245 of file iop_regs.h.
| #define A_IOP_GPU_DATA 0x1F801810 |
Definition at line 244 of file iop_regs.h.
| #define A_IOP_I_MASK 0xBF801074 |
Definition at line 159 of file iop_regs.h.
| #define A_IOP_I_STAT 0xBF801070 |
Definition at line 158 of file iop_regs.h.
| #define A_IOP_IREG_1078 0xBF801078 |
Definition at line 161 of file iop_regs.h.
| #define A_IOP_IREG_107C 0xBF80107C |
Definition at line 162 of file iop_regs.h.
| #define A_IOP_IRQ_CTRL 0xBF801450 |
Definition at line 134 of file iop_regs.h.
| #define A_IOP_REG_1454 0xBF801454 |
Definition at line 135 of file iop_regs.h.
| #define A_IOP_SBUS_REG_BASE 0xBD000000 |
Definition at line 263 of file iop_regs.h.
| #define A_IOP_SIF0_HANDLER ((vu32 *)(0x000003C0)) |
Definition at line 12 of file iop_regs.h.
| #define A_IOP_SIF1_HANDLER ((vu32 *)(0x000003D0)) |
Definition at line 13 of file iop_regs.h.
| #define A_IOP_SIF2_HANDLER ((vu32 *)(0x000003E0)) |
Definition at line 14 of file iop_regs.h.
| #define A_IOP_SIF_1450 0xBF801450 |
Definition at line 193 of file iop_regs.h.
| #define A_IOP_SIF_1454 0xBF801454 |
Definition at line 194 of file iop_regs.h.
| #define A_IOP_SPU1_BASE 0x1F801C00 |
Definition at line 248 of file iop_regs.h.
| #define A_IOP_UNK_2070 0xBF802070 |
Definition at line 250 of file iop_regs.h.
| #define A_PS1_1F801018 0x1F801018 |
unknown, related to CD? 32-bit
Definition at line 138 of file iop_regs.h.
| #define A_PS1_1F801020 0x1F801020 |
unknown, related to CD? 32-bit
Definition at line 141 of file iop_regs.h.
| #define A_PS1_CD_REG0 0x1F801800 |
Definition at line 239 of file iop_regs.h.
| #define A_PS1_CD_REG1 0x1F801801 |
Definition at line 240 of file iop_regs.h.
| #define A_PS1_CD_REG2 0x1F801802 |
Definition at line 241 of file iop_regs.h.
| #define A_PS1_CD_REG3 0x1F801803 |
Definition at line 242 of file iop_regs.h.
| #define A_PS1_RAM_SIZE 0x1F801060 |
Definition at line 156 of file iop_regs.h.
| #define A_PS1_SIO0_BAUD 0x1F80104E |
Definition at line 148 of file iop_regs.h.
| #define A_PS1_SIO0_CTRL 0x1F80104A |
Definition at line 147 of file iop_regs.h.
| #define A_PS1_SIO0_DATA 0x1F801040 |
Definition at line 144 of file iop_regs.h.
| #define A_PS1_SIO0_MODE 0x1F801048 |
Definition at line 146 of file iop_regs.h.
| #define A_PS1_SIO0_STAT 0x1F801044 |
Definition at line 145 of file iop_regs.h.
| #define A_PS1_SIO1_BAUD 0x1F80105E |
Definition at line 154 of file iop_regs.h.
| #define A_PS1_SIO1_CTRL 0x1F80105A |
Definition at line 153 of file iop_regs.h.
| #define A_PS1_SIO1_DATA 0x1F801050 |
Definition at line 150 of file iop_regs.h.
| #define A_PS1_SIO1_MODE 0x1F801058 |
Definition at line 152 of file iop_regs.h.
| #define A_PS1_SIO1_STAT 0x1F801054 |
Definition at line 151 of file iop_regs.h.
| #define CDVD_DEC_ROTL_EN (1 << 1) |
Definition at line 129 of file iop_regs.h.
| #define CDVD_DEC_SWAP_EN (1 << 3) |
Definition at line 131 of file iop_regs.h.
| #define CDVD_DEC_UNK_EN (1 << 2) |
Definition at line 130 of file iop_regs.h.
| #define CDVD_DEC_XOR_EN (1 << 0) |
Definition at line 128 of file iop_regs.h.
| #define CDVD_S_STAT_BUSY (1 << 7) |
Definition at line 81 of file iop_regs.h.
| #define CDVD_S_STAT_RFIFO_EMPTY (1 << 6) |
Definition at line 80 of file iop_regs.h.
| #define CDVD_TRAY_STAT_OPEN (1 << 0) |
bits for CDVD_TRAY_STAT register
Definition at line 53 of file iop_regs.h.
| #define GM_IF ((vu32 *)0x1F801450) |
Definition at line 441 of file iop_regs.h.
| #define GM_IOP_TYPE (0x80000000) |
Definition at line 442 of file iop_regs.h.
| #define IOP_CHCR_08 (1 << 8) |
Definition at line 428 of file iop_regs.h.
| #define IOP_CHCR_30 (1 << 30) |
Unknown, seems to be related to SIF2?
Definition at line 416 of file iop_regs.h.
| #define IOP_CHCR_CO (1 << 9) |
Continuous transfer, TR is not cleared when transfer has completed.
Definition at line 425 of file iop_regs.h.
| #define IOP_CHCR_DR (1 << 0) |
Direction: 0 = "to RAM", 1 = "from RAM"
Definition at line 431 of file iop_regs.h.
| #define IOP_CHCR_LI (1 << 10) |
Linked List(DMA tags), valid for GPU(SIF2?), SPU and SIF0
Definition at line 422 of file iop_regs.h.
| #define IOP_CHCR_TR (1 << 24) |
Transfer(used to kick a transfer and determine if a transfer is in progress).
Definition at line 419 of file iop_regs.h.
| #define IOP_CPU_TYPE (*GM_IF & GM_IOP_TYPE) |
Definition at line 444 of file iop_regs.h.
| #define IOP_FROM_MEM 1 |
Definition at line 434 of file iop_regs.h.
| #define IOP_I_STAT_SBUS (1 << 1) |
Definition at line 437 of file iop_regs.h.
| #define IOP_I_STAT_VB (1 << 0) |
Definition at line 436 of file iop_regs.h.
| #define IOP_TO_MEM 0 |
Definition at line 433 of file iop_regs.h.
| #define IOP_TYPE_MIPSR3000 0 |
Definition at line 445 of file iop_regs.h.
| #define IOP_TYPE_POWERPC 1 |
Definition at line 446 of file iop_regs.h.
| #define M_reg8 | ( | ___base, | |
| ___reg_num ) |
Definition at line 16 of file iop_regs.h.
| #define R_CDVD_DEC_CTRL M_reg8(A_CDVD_REG_BASE, 0x3A) |
Decryption control, enable/disable decryption algorithms on data being read from disc using 5th byte of current key as the XOR key. Bit 0 is Data XOR enable, this causes data being read from the disc to be XOR'd with the value of the CDVD_KEY_DATA4 register. Bit 1 is Rotate Left enable, this causes data being read to be rotated left by a specified number of bits(see Bits 4-6). Bit 2 doesn't seem to do anything.. Bit 3 is Swap Nibble enable, this causes data being read to have the the high and low nibbles of each byte to be swapped. Bits 4-7 is the number of bits the data being read will be shifted left byte, if enabled.
Definition at line 125 of file iop_regs.h.
| #define R_CDVD_DISK_TYPE M_reg8(A_CDVD_REG_BASE, 0x0F) |
Definition at line 55 of file iop_regs.h.
| #define R_CDVD_KEY_DATA0 M_reg8(A_CDVD_REG_BASE, 0x20) |
Definition at line 86 of file iop_regs.h.
| #define R_CDVD_KEY_DATA1 M_reg8(A_CDVD_REG_BASE, 0x21) |
Definition at line 87 of file iop_regs.h.
| #define R_CDVD_KEY_DATA2 M_reg8(A_CDVD_REG_BASE, 0x22) |
Definition at line 88 of file iop_regs.h.
| #define R_CDVD_KEY_DATA3 M_reg8(A_CDVD_REG_BASE, 0x23) |
Definition at line 89 of file iop_regs.h.
| #define R_CDVD_KEY_DATA4 M_reg8(A_CDVD_REG_BASE, 0x24) |
Definition at line 90 of file iop_regs.h.
| #define R_CDVD_KEY_DATA5 M_reg8(A_CDVD_REG_BASE, 0x28) |
Definition at line 92 of file iop_regs.h.
| #define R_CDVD_KEY_DATA6 M_reg8(A_CDVD_REG_BASE, 0x29) |
Definition at line 93 of file iop_regs.h.
| #define R_CDVD_KEY_DATA7 M_reg8(A_CDVD_REG_BASE, 0x2A) |
Definition at line 94 of file iop_regs.h.
| #define R_CDVD_KEY_DATA8 M_reg8(A_CDVD_REG_BASE, 0x2B) |
Definition at line 95 of file iop_regs.h.
| #define R_CDVD_KEY_DATA9 M_reg8(A_CDVD_REG_BASE, 0x2C) |
Definition at line 96 of file iop_regs.h.
| #define R_CDVD_KEY_DATAA M_reg8(A_CDVD_REG_BASE, 0x30) |
Definition at line 98 of file iop_regs.h.
| #define R_CDVD_KEY_DATAB M_reg8(A_CDVD_REG_BASE, 0x31) |
Definition at line 99 of file iop_regs.h.
| #define R_CDVD_KEY_DATAC M_reg8(A_CDVD_REG_BASE, 0x32) |
Definition at line 100 of file iop_regs.h.
| #define R_CDVD_KEY_DATAD M_reg8(A_CDVD_REG_BASE, 0x33) |
Definition at line 101 of file iop_regs.h.
| #define R_CDVD_KEY_DATAE M_reg8(A_CDVD_REG_BASE, 0x34) |
Definition at line 102 of file iop_regs.h.
| #define R_CDVD_KEY_FLAGS M_reg8(A_CDVD_REG_BASE, 0x38) |
Flags indicating the format of the key data. Bits 0-2 set indicate that the corresponding 5-byte key data block is valid. Bits 3-7 are unknown, but may be used to determine additional encryption measures used for DSP<->mechacon communication.
Definition at line 108 of file iop_regs.h.
| #define R_CDVD_KEY_XOR M_reg8(A_CDVD_REG_BASE, 0x39) |
Key Data Block XOR key XOR'd with each byte of each valid Key Data Block to decrypt their values.
Definition at line 113 of file iop_regs.h.
| #define R_CDVD_LAST_ERROR M_reg8(A_CDVD_REG_BASE, 0x06) |
Definition at line 38 of file iop_regs.h.
| #define R_CDVD_N_CMD M_reg8(A_CDVD_REG_BASE, 0x04) |
N_CMD is written to supply the command number for a CDVD "N" command.
Definition at line 19 of file iop_regs.h.
| #define R_CDVD_N_CMD_PARAM_FIFO M_reg8(A_CDVD_REG_BASE, 0x05) |
Definition at line 36 of file iop_regs.h.
| #define R_CDVD_N_CMD_STATUS M_reg8(A_CDVD_REG_BASE, 0x05) |
CDVD Register 0x05 is written to add a byte to N-command param FIFO and read to determine N-command status. Command status: bit explaination
0 Unknown 1 Unknown 2 Unknown 3 Unknown 4 Unknown 5 Unknown 6 result FIFO empty(0 = result in FIFO, 1 = result FIFO is empty) 7 busy(1 if currently processing a N-command)
Definition at line 35 of file iop_regs.h.
| #define R_CDVD_REG07 M_reg8(A_CDVD_REG_BASE, 0x07) |
Definition at line 41 of file iop_regs.h.
| #define R_CDVD_S_CMD M_reg8(A_CDVD_REG_BASE, 0x16) |
CDVD Register "S_CMD" : 0x16 write 8-bit "S" command number after parameters. read: unknown
Definition at line 61 of file iop_regs.h.
| #define R_CDVD_S_PARAM_FIFO M_reg8(A_CDVD_REG_BASE, 0x17) |
Definition at line 78 of file iop_regs.h.
| #define R_CDVD_S_RES_FIFO M_reg8(A_CDVD_REG_BASE, 0x18) |
S_RES_FIFO is read to get a byte from the S-command result FIFO.
Definition at line 84 of file iop_regs.h.
| #define R_CDVD_S_STATUS M_reg8(A_CDVD_REG_BASE, 0x17) |
Definition at line 77 of file iop_regs.h.
| #define R_CDVD_TRAY_STATUS M_reg8(A_CDVD_REG_BASE, 0x0A) |
Definition at line 50 of file iop_regs.h.
| #define R_IOP_BF80146E ((vu8 *)(A_IOP_BF80146E)) |
Definition at line 395 of file iop_regs.h.
| #define R_IOP_BF801470 ((vu16 *)(A_IOP_BF801470)) |
Definition at line 398 of file iop_regs.h.
| #define R_IOP_BF801472 ((vu16 *)(A_IOP_BF801472)) |
Definition at line 399 of file iop_regs.h.
| #define R_IOP_BF803200 ((vu8 *)(A_IOP_BF803200)) |
Definition at line 402 of file iop_regs.h.
| #define R_IOP_BF803204 ((vu8 *)(A_IOP_BF803204)) |
Definition at line 403 of file iop_regs.h.
| #define R_IOP_BF803218 ((vu8 *)(A_IOP_BF803218)) |
Definition at line 404 of file iop_regs.h.
| #define R_IOP_BF808400 ((vu32 *)(A_IOP_BF808400)) |
Definition at line 407 of file iop_regs.h.
| #define R_IOP_BF808414 ((vu32 *)(A_IOP_BF808414)) |
Definition at line 408 of file iop_regs.h.
| #define R_IOP_BF808420 ((vu32 *)(A_IOP_BF808420)) |
Definition at line 410 of file iop_regs.h.
| #define R_IOP_BF808428 ((vu32 *)(A_IOP_BF808428)) |
Definition at line 411 of file iop_regs.h.
| #define R_IOP_BF808430 ((vu32 *)(A_IOP_BF808430)) |
Definition at line 412 of file iop_regs.h.
| #define R_IOP_BF80844C ((vu32 *)(A_IOP_BF80844C)) |
Definition at line 409 of file iop_regs.h.
| #define R_IOP_BF80847C ((vu32 *)(A_IOP_BF80847C)) |
Definition at line 413 of file iop_regs.h.
| #define R_IOP_D0_BCR ((vu32 *)(A_IOP_D0_BCR)) |
Definition at line 300 of file iop_regs.h.
| #define R_IOP_D0_CHCR ((vu32 *)(A_IOP_D0_CHCR)) |
Definition at line 301 of file iop_regs.h.
| #define R_IOP_D0_MADR ((vu32 *)(A_IOP_D0_MADR)) |
Definition at line 299 of file iop_regs.h.
| #define R_IOP_D10_BCR ((vu32 *)(A_IOP_D10_BCR)) |
Definition at line 344 of file iop_regs.h.
| #define R_IOP_D10_CHCR ((vu32 *)(A_IOP_D10_CHCR)) |
Definition at line 345 of file iop_regs.h.
| #define R_IOP_D10_MADR ((vu32 *)(A_IOP_D10_MADR)) |
Definition at line 343 of file iop_regs.h.
| #define R_IOP_D11_BCR ((vu32 *)(A_IOP_D11_BCR)) |
Definition at line 348 of file iop_regs.h.
| #define R_IOP_D11_CHCR ((vu32 *)(A_IOP_D11_CHCR)) |
Definition at line 349 of file iop_regs.h.
| #define R_IOP_D11_MADR ((vu32 *)(A_IOP_D11_MADR)) |
Definition at line 347 of file iop_regs.h.
| #define R_IOP_D12_BCR ((vu32 *)(A_IOP_D12_BCR)) |
Definition at line 352 of file iop_regs.h.
| #define R_IOP_D12_CHCR ((vu32 *)(A_IOP_D12_CHCR)) |
Definition at line 353 of file iop_regs.h.
| #define R_IOP_D12_MADR ((vu32 *)(A_IOP_D12_MADR)) |
Definition at line 351 of file iop_regs.h.
| #define R_IOP_D1_BCR ((vu32 *)(A_IOP_D1_BCR)) |
Definition at line 304 of file iop_regs.h.
| #define R_IOP_D1_CHCR ((vu32 *)(A_IOP_D1_CHCR)) |
Definition at line 305 of file iop_regs.h.
| #define R_IOP_D1_MADR ((vu32 *)(A_IOP_D1_MADR)) |
Definition at line 303 of file iop_regs.h.
| #define R_IOP_D2_BCR ((vu32 *)(A_IOP_D2_BCR)) |
Definition at line 308 of file iop_regs.h.
| #define R_IOP_D2_BCR_BC ((vu16 *)(A_IOP_D2_BCR + 0x02)) |
Definition at line 310 of file iop_regs.h.
| #define R_IOP_D2_BCR_BS ((vu16 *)(A_IOP_D2_BCR + 0x00)) |
Definition at line 309 of file iop_regs.h.
| #define R_IOP_D2_CHCR ((vu32 *)(A_IOP_D2_CHCR)) |
Definition at line 311 of file iop_regs.h.
| #define R_IOP_D2_MADR ((vu32 *)(A_IOP_D2_MADR)) |
Definition at line 307 of file iop_regs.h.
| #define R_IOP_D3_BCR ((vu32 *)(A_IOP_D3_BCR)) |
Definition at line 314 of file iop_regs.h.
| #define R_IOP_D3_CHCR ((vu32 *)(A_IOP_D3_CHCR)) |
Definition at line 315 of file iop_regs.h.
| #define R_IOP_D3_MADR ((vu32 *)(A_IOP_D3_MADR)) |
Definition at line 313 of file iop_regs.h.
| #define R_IOP_D4_BCR ((vu32 *)(A_IOP_D4_BCR)) |
Definition at line 318 of file iop_regs.h.
| #define R_IOP_D4_CHCR ((vu32 *)(A_IOP_D4_CHCR)) |
Definition at line 319 of file iop_regs.h.
| #define R_IOP_D4_MADR ((vu32 *)(A_IOP_D4_MADR)) |
Definition at line 317 of file iop_regs.h.
| #define R_IOP_D4_TADR ((vu32 *)(A_IOP_D4_TADR)) |
Definition at line 320 of file iop_regs.h.
| #define R_IOP_D5_BCR ((vu32 *)(A_IOP_D5_BCR)) |
Definition at line 323 of file iop_regs.h.
| #define R_IOP_D5_CHCR ((vu32 *)(A_IOP_D5_CHCR)) |
Definition at line 324 of file iop_regs.h.
| #define R_IOP_D5_MADR ((vu32 *)(A_IOP_D5_MADR)) |
Definition at line 322 of file iop_regs.h.
| #define R_IOP_D6_BCR ((vu32 *)(A_IOP_D6_BCR)) |
Definition at line 327 of file iop_regs.h.
| #define R_IOP_D6_CHCR ((vu32 *)(A_IOP_D6_CHCR)) |
Definition at line 328 of file iop_regs.h.
| #define R_IOP_D6_MADR ((vu32 *)(A_IOP_D6_MADR)) |
Definition at line 326 of file iop_regs.h.
| #define R_IOP_D7_BCR ((vu32 *)(A_IOP_D7_BCR)) |
Definition at line 331 of file iop_regs.h.
| #define R_IOP_D7_CHCR ((vu32 *)(A_IOP_D7_CHCR)) |
Definition at line 332 of file iop_regs.h.
| #define R_IOP_D7_MADR ((vu32 *)(A_IOP_D7_MADR)) |
Definition at line 330 of file iop_regs.h.
| #define R_IOP_D8_BCR ((vu32 *)(A_IOP_D8_BCR)) |
Definition at line 335 of file iop_regs.h.
| #define R_IOP_D8_CHCR ((vu32 *)(A_IOP_D8_CHCR)) |
Definition at line 336 of file iop_regs.h.
| #define R_IOP_D8_MADR ((vu32 *)(A_IOP_D8_MADR)) |
Definition at line 334 of file iop_regs.h.
| #define R_IOP_D9_BCR ((vu32 *)(A_IOP_D9_BCR)) |
Definition at line 339 of file iop_regs.h.
| #define R_IOP_D9_CHCR ((vu32 *)(A_IOP_D9_CHCR)) |
Definition at line 340 of file iop_regs.h.
| #define R_IOP_D9_MADR ((vu32 *)(A_IOP_D9_MADR)) |
Definition at line 338 of file iop_regs.h.
| #define R_IOP_D9_TADR ((vu32 *)(A_IOP_D9_TADR)) |
Definition at line 341 of file iop_regs.h.
| #define R_IOP_DICR ((vu32 *)(A_IOP_DICR)) |
Definition at line 365 of file iop_regs.h.
| #define R_IOP_DICR2 ((vu32 *)(A_IOP_DICR2)) |
Definition at line 366 of file iop_regs.h.
| #define R_IOP_DICR3 ((vu32 *)(A_IOP_DICR3)) |
Definition at line 367 of file iop_regs.h.
| #define R_IOP_DMAC_1560 ((vu32 *)(A_IOP_DMAC_1560)) |
Definition at line 357 of file iop_regs.h.
| #define R_IOP_DMAC_1564 ((vu32 *)(A_IOP_DMAC_1564)) |
Definition at line 358 of file iop_regs.h.
| #define R_IOP_DMAC_1568 ((vu32 *)(A_IOP_DMAC_1568)) |
Definition at line 359 of file iop_regs.h.
| #define R_IOP_DMAC_1578 ((vu32 *)(A_IOP_DMAC_1578)) |
??? Set to 1 by DMACMAN when DMAC is initilized, set to 0 by DMACMAN when shut down.
Definition at line 370 of file iop_regs.h.
| #define R_IOP_DPCR ((vu32 *)(A_IOP_DPCR)) |
Definition at line 361 of file iop_regs.h.
| #define R_IOP_DPCR2 ((vu32 *)(A_IOP_DPCR2)) |
Definition at line 362 of file iop_regs.h.
| #define R_IOP_DPCR3 ((vu32 *)(A_IOP_DPCR3)) |
Definition at line 363 of file iop_regs.h.
| #define R_IOP_GPU_CTRL ((vu32 *)(A_IOP_GPU_CTRL)) |
Definition at line 385 of file iop_regs.h.
| #define R_IOP_GPU_DATA ((vu32 *)(A_IOP_GPU_DATA)) |
Definition at line 384 of file iop_regs.h.
| #define R_IOP_I_MASK ((vu32 *)(A_IOP_I_MASK)) |
Definition at line 292 of file iop_regs.h.
| #define R_IOP_I_STAT ((vu32 *)(A_IOP_I_STAT)) |
Definition at line 291 of file iop_regs.h.
| #define R_IOP_IREG_1078 ((vu32 *)(A_IOP_IREG_1078)) |
Definition at line 295 of file iop_regs.h.
| #define R_IOP_IREG_107C ((vu32 *)(A_IOP_IREG_107C)) |
Definition at line 296 of file iop_regs.h.
| #define R_IOP_IRQ_CTRL ((vu32 *)(A_IOP_IRQ_CTRL)) |
Definition at line 268 of file iop_regs.h.
| #define R_IOP_REG_1454 ((vu32 *)(A_IOP_REG_1454)) |
Definition at line 271 of file iop_regs.h.
| #define R_IOP_SBUS_REG_BASE ((vu32 *)(A_IOP_SBUS_REG_BASE)) |
IOP SBUS Registers(add PS2_SBUS_xxx to this to get register address)
Definition at line 390 of file iop_regs.h.
| #define R_IOP_SIF_1450 ((vu32 *)(A_IOP_SIF_1450)) |
Definition at line 374 of file iop_regs.h.
| #define R_IOP_SIF_1454 ((vu32 *)(A_IOP_SIF_1454)) |
Definition at line 375 of file iop_regs.h.
| #define R_IOP_UNK_2070 ((vu32 *)(A_IOP_UNK_2070)) |
Definition at line 387 of file iop_regs.h.
| #define R_PS1_CD_REG0 ((vu8 *)(A_PS1_CD_REG0)) |
Definition at line 379 of file iop_regs.h.
| #define R_PS1_CD_REG1 ((vu8 *)(A_PS1_CD_REG1)) |
Definition at line 380 of file iop_regs.h.
| #define R_PS1_CD_REG2 ((vu8 *)(A_PS1_CD_REG2)) |
Definition at line 381 of file iop_regs.h.
| #define R_PS1_CD_REG3 ((vu8 *)(A_PS1_CD_REG3)) |
Definition at line 382 of file iop_regs.h.
| #define R_PS1_RAM_SIZE ((vu32 *)(A_PS1_RAM_SIZE)) |
Definition at line 289 of file iop_regs.h.
| #define R_PS1_SIO0_BAUD ((vu16 *)(A_PS1_SIO0_BAUD)) |
Definition at line 278 of file iop_regs.h.
| #define R_PS1_SIO0_CTRL ((vu16 *)(A_PS1_SIO0_CTRL)) |
Definition at line 277 of file iop_regs.h.
| #define R_PS1_SIO0_DATA ((vu16 *)(A_PS1_SIO0_DATA)) |
Definition at line 274 of file iop_regs.h.
| #define R_PS1_SIO0_MODE ((vu16 *)(A_PS1_SIO0_MODE)) |
Definition at line 276 of file iop_regs.h.
| #define R_PS1_SIO0_STAT ((vu16 *)(A_PS1_SIO0_STAT)) |
Definition at line 275 of file iop_regs.h.
| #define R_PS1_SIO1_BAUD ((vu16 *)(A_PS1_SIO1_BAUD)) |
Definition at line 286 of file iop_regs.h.
| #define R_PS1_SIO1_CTRL ((vu16 *)(A_PS1_SIO1_CTRL)) |
Definition at line 285 of file iop_regs.h.
| #define R_PS1_SIO1_DATA ((vu16 *)(A_PS1_SIO1_DATA)) |
Definition at line 282 of file iop_regs.h.
| #define R_PS1_SIO1_MODE ((vu16 *)(A_PS1_SIO1_MODE)) |
Definition at line 284 of file iop_regs.h.
| #define R_PS1_SIO1_STAT ((vu16 *)(A_PS1_SIO1_STAT)) |
Definition at line 283 of file iop_regs.h.
1.18.0