19static u32 DMA_CHCR[10] = { 0x10008000, 0x10009000, 0x1000A000, 0x1000B000, \
20 0x1000B400, 0x1000C000, 0x1000C400, 0x1000C800, \
21 0x1000D000, 0x1000D400 };
23static u32 DMA_MADR[10] = { 0x10008010, 0x10009010, 0x1000A010, 0x1000B010, \
24 0x1000B410, 0x1000C010, 0x1000C410, 0x1000C810, \
25 0x1000D010, 0x1000D410 };
27static u32 DMA_SIZE[10] = { 0x10008020, 0x10009020, 0x00000000, 0x00000000, \
28 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
29 0x00000000, 0x00000000 };
31static u32 DMA_TADR[10] = { 0x10008030, 0x10009030, 0x1000A030, 0x00000000, \
32 0x1000B430, 0x00000000, 0x1000C430, 0x00000000, \
33 0x00000000, 0x1000D430 };
35static u32 DMA_ASR0[10] = { 0x10008040, 0x10009040, 0x1000A040, 0x00000000, \
36 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
37 0x00000000, 0x00000000 };
39static u32 DMA_ASR1[10] = { 0x10008050, 0x10009050, 0x1000A050, 0x00000000, \
40 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
41 0x00000000, 0x00000000 };
43static u32 DMA_SADR[10] = { 0x10008080, 0x10009080, 0x1000A080, 0x00000000, \
44 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
45 0x1000D080, 0x1000D480 };
47static u32 DMA_QWC[10] = { 0x00000000, 0x00000000, 0x1000A020, 0x1000B020, \
48 0x1000B420, 0x1000C020, 0x1000C420, 0x1000C820, \
49 0x1000D020, 0x1000D420 };
51static u8 DMA_TAG_ENABLE[10] = { 1, 1, 0, 1, 1, 1 ,1 ,1, 1, 1 };
53static char* DMA_NAME[10] = {
"VIF0",
"VIF1",
"GIF",
"fromIPU",
"toIPU", \
54 "SIF0",
"SIF1",
"SIF2",
"fromSPR",
"toSPR" };
56static void* DMA_SPR = (
void*)SPR_START;