sdk-world v2026.11.05
PS2 SDK - world tier (copyleft-allowed, non-essential packages)
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dmaInit.h
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1
5// ____ ___ | / _____ _____
6// | __ | |___/ | |
7// |___| ___| | \ __|__ | gsKit Open Source Project.
8// ----------------------------------------------------------------------
9// Copyright 2004 - Chris "Neovanglist" Gilbert <Neovanglist@LainOS.org>
10// Licenced under Academic Free License version 2.0
11// Review gsKit README & LICENSE files for further details.
12//
13// dmaInit.h - Header for dmaInit.c
14//
15// Portions taken from ooPo's tutorial at:
16// http://www.oopo.net/consoledev/files/ps2-using-the-dmac.txt
17//
18
19#ifndef __DMAINIT_H__
20#define __DMAINIT_H__
21
22#include "dmaKit.h"
23
24#define D_CTRL_RELE_OFF 0x0
25#define D_CTRL_RELE_ON 0x1
26
27#define D_CTRL_MFD_OFF 0x0
28#define D_CTRL_MFD_RES 0x1
29#define D_CTRL_MFD_VIF 0x2
30#define D_CTRL_MFD_GIF 0x3
31
32#define D_CTRL_STS_UNSPEC 0x0
33#define D_CTRL_STS_SIF 0x1
34#define D_CTRL_STS_SPR 0x2
35#define D_CTRL_STS_IPU 0x3
36
37#define D_CTRL_STD_OFF 0x0
38#define D_CTRL_STD_VIF 0x1
39#define D_CTRL_STD_GIF 0x2
40#define D_CTRL_STD_SIF 0x3
41
42#define D_CTRL_RCYC_8 0x0
43#define D_CTRL_RCYC_16 0x1
44#define D_CTRL_RCYC_32 0x2
45#define D_CTRL_RCYC_64 0x3
46#define D_CTRL_RCYC_128 0x4
47#define D_CTRL_RCYC_256 0x5
48
49#define DMA_REG_CTRL (volatile u32 *)0x1000E000
50#define DMA_REG_STAT (volatile u32 *)0x1000E010
51#define DMA_REG_PCR (volatile u32 *)0x1000E020
52#define DMA_REG_SQWC (volatile u32 *)0x1000E030
53#define DMA_REG_RBSR (volatile u32 *)0x1000E040
54#define DMA_REG_RBOR (volatile u32 *)0x1000E050
55
56#define DMA_SET_CIS(A) *DMA_REG_STAT = (u32)(A)
57#define DMA_SET_CIM(A) *DMA_REG_STAT = (u32)((A) << 16)
58#define DMA_SET_CPCOND(A) *DMA_REG_PCR = (u32)(A)
59
60#define DMA_CHANNEL_VIF0 0x0
61#define DMA_CHANNEL_VIF1 0x1
62#define DMA_CHANNEL_GIF 0x2
63#define DMA_CHANNEL_FROMIPU 0x3
64#define DMA_CHANNEL_TOIPU 0x4
65#define DMA_CHANNEL_SIF0 0x5
66#define DMA_CHANNEL_SIF1 0x6
67#define DMA_CHANNEL_SIF2 0x7
68#define DMA_CHANNEL_FROMSPR 0x8
69#define DMA_CHANNEL_TOSPR 0x9
70
71#define DMA_SET_CTRL(A,B,C,D,E,F) \
72 (u32)(A & 0x00000001) << 0 | (u32)(B & 0x00000001) << 1 | \
73 (u32)(C & 0x00000003) << 2 | (u32)(D & 0x00000003) << 4 | \
74 (u32)(E & 0x00000003) << 6 | (u32)(F & 0x00000007) << 8
75
76#ifdef __cplusplus
77extern "C" {
78#endif
79
81int dmaKit_init(u32 RELE, u32 MFD, u32 STS,
82 u32 STD, u32 RCYC, u16 fastwaitchannels);
83
85int dmaKit_chan_init(u32 channel);
86
87#ifdef __cplusplus
88}
89#endif
90
91#endif /* __DMAINIT_H__ */
int dmaKit_init(u32 RELE, u32 MFD, u32 STS, u32 STD, u32 RCYC, u16 fastwaitchannels)
DMAC Initilization.
Definition dmaInit.c:18
int dmaKit_chan_init(u32 channel)
DMA Channel Initilization.
Definition dmaInit.c:43