sdk-core
v2026.11.05
PS2 SDK - core tier (build-critical EE/IOP modules)
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asm.h
Go to the documentation of this file.
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/*
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* Copyright (c) 1996-2007 MIPS Technologies, Inc.
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* Copyright (C) 2009 CodeSourcery, LLC.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright
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* notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with
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* the distribution.
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* * Neither the name of MIPS Technologies Inc. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* asm.h: various macros to help assembly language writers
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*/
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#ifndef _MIPS_ASM_H_
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#define _MIPS_ASM_H_
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/* ABI specific stack frame layout and manipulation. */
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#if _MIPS_SIM==_ABIO32 && ! __mips64
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/* Standard O32 */
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#define SZREG 4
/* saved register size */
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#define REG_S sw
/* store saved register */
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#define REG_L lw
/* load saved register */
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#define SZARG 4
/* argument register size */
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#define NARGSAVE 4
/* arg register space on caller stack */
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#define ALSZ 7
/* stack alignment - 1 */
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#define ALMASK (~7)
/* stack alignment mask */
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#define LOG2_STACK_ALGN 3
/* log2(8) */
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#define SZPTR 4
/* pointer size */
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#define LOG2_SZPTR 2
/* log2(4) */
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#define PTR_S sw
/* store pointer */
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#define PTR_L lw
/* load pointer */
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#define PTR_SUBU subu
/* decrement pointer */
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#define PTR_ADDU addu
/* increment pointer */
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#define PTR .word
/* pointer type pseudo */
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#elif _MIPS_SIM==_ABIO32 && __mips64
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/* Algorithmics O32+64-bit */
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#define SZREG 8
/* saved register size */
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#define REG_S sd
/* store saved register */
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#define REG_L ld
/* load saved register */
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#define SZARG 4
/* argument register size */
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#define NARGSAVE 4
/* arg register space on caller stack */
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#define ALSZ 7
/* stack alignment - 1 */
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#define ALMASK (~7)
/* stack alignment mask */
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#define LOG2_STACK_ALGN 3
/* log2(8) */
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#define SZPTR 4
/* pointer size */
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#define LOG2_SZPTR 2
/* log2(4) */
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#define PTR_S sw
/* store pointer */
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#define PTR_L lw
/* load pointer */
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#define PTR_SUBU subu
/* decrement pointer */
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#define PTR_ADDU addu
/* increment pointer */
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#define PTR .word
/* pointer type pseudo */
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#elif _MIPS_SIM==_ABIO64
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/* Cygnus O64 */
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#define SZREG 8
/* saved register size */
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#define REG_S sd
/* store saved register */
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#define REG_L ld
/* load saved register */
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#define SZARG 8
/* argument register size */
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#define NARGSAVE 4
/* arg register space on caller stack */
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#define ALSZ 7
/* stack alignment - 1 */
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#define ALMASK (~7)
/* stack alignment mask */
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#define LOG2_STACK_ALGN 3
/* log2(8) */
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#define SZPTR 4
/* pointer size */
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#define LOG2_SZPTR 2
/* log2(4) */
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#define PTR_S sw
/* store pointer */
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#define PTR_L lw
/* load pointer */
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#define PTR_SUBU subu
/* decrement pointer */
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#define PTR_ADDU addu
/* increment pointer */
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#define PTR .word
/* pointer type pseudo */
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#elif _MIPS_SIM==_ABIN32
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/* Standard N32 */
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#define SZREG 8
/* saved register size */
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#define REG_S sd
/* store saved register */
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#define REG_L ld
/* load saved register */
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#define SZARG 8
/* argument register size */
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#define NARGSAVE 0
/* arg register space on caller stack */
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#define ALSZ 15
/* stack alignment - 1 */
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#define ALMASK (~15)
/* stack alignment mask */
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#define LOG2_STACK_ALGN 4
/* log2(16) */
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#define SZPTR 4
/* pointer size */
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#define LOG2_SZPTR 2
/* log2(4) */
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#define PTR_S sw
/* store pointer */
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#define PTR_L lw
/* load pointer */
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#define PTR_SUBU subu
/* decrement pointer (SGI uses sub) */
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#define PTR_ADDU addu
/* increment pointer (SGI uses add) */
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#define PTR .word
/* pointer type pseudo */
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#elif _MIPS_SIM==_ABI64
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/* Standard N64 */
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#define SZREG 8
/* saved register size */
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#define REG_S sd
/* store saved register */
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#define REG_L ld
/* load saved register */
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#define SZARG 8
/* argument register size */
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#define NARGSAVE 0
/* arg register space on caller stack */
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#define ALSZ 15
/* stack alignment - 1 */
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#define ALMASK (~15)
/* stack alignment mask */
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#define LOG2_STACK_ALGN 4
/* log2(16) */
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#define SZPTR 8
/* pointer size */
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#define LOG2_SZPTR 3
/* log2(8) */
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#define PTR_S sd
/* store pointer */
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#define PTR_L ld
/* load pointer */
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#define PTR_SUBU dsubu
/* decrement pointer */
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#define PTR_ADDU daddu
/* increment pointer */
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#define PTR .dword
/* pointer type pseudo */
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#else
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#error Unknown ABI
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#endif
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/* Concatenate two names. */
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#ifdef __STDC__
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# define _ASMCONCAT(A, B) A ## B
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#else
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# define _ASMCONCAT(A, B) A
/**/
B
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#endif
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/* Name of reset code section. */
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#ifndef _RESET_SECTION
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# define _RESET_SECTION .section .reset, "ax", @progbits
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#endif
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#ifndef _RESET_SECTION_NAMED
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/* No function section support for now, since binutils fails to cope with
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external branches. */
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# define _RESET_SECTION_NAMED(name) .pushsection .reset, "ax", @progbits
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#endif
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/* Name of boot code section. */
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#ifndef _BOOT_SECTION
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# define _BOOT_SECTION .section .boot, "ax", @progbits
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#endif
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#ifndef _BOOT_SECTION_NAMED
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/* No function section support for now, since binutils fails to cope with
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external branches. */
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# define _BOOT_SECTION_NAMED(name) .pushsection .boot, "ax", @progbits
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#endif
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/* Name of standard code section. */
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#ifndef _NORMAL_SECTION_UNNAMED
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# define _NORMAL_SECTION_UNNAMED .section .text, "ax", @progbits
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#endif
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#ifndef _NORMAL_SECTION_NAMED
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# ifdef _FUNCTION_SECTIONS_
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# define _NORMAL_SECTION_NAMED(name) .pushsection .text ##.name, "ax", @progbits
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# else
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# define _NORMAL_SECTION_NAMED(name) .pushsection .text, "ax", @progbits
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# endif
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#endif
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/* Default code section. */
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#ifndef _TEXT_SECTION_NAMED
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# if defined(_RESETCODE)
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# define _TEXT_SECTION_NAMED _RESET_SECTION_NAMED
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# elif defined(_BOOTCODE)
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# define _TEXT_SECTION_NAMED _BOOT_SECTION_NAMED
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# else
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# define _TEXT_SECTION_NAMED _NORMAL_SECTION_NAMED
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# endif
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#endif
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#ifndef _TEXT_SECTION
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# if defined(_RESETCODE)
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# define _TEXT_SECTION _RESET_SECTION
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# elif defined(_BOOTCODE)
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# define _TEXT_SECTION _BOOT_SECTION
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# else
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# define _TEXT_SECTION _NORMAL_SECTION_UNNAMED
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# endif
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_TEXT_SECTION
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#endif
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/*
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* Leaf functions declarations.
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*/
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/* Global leaf function. */
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#define LEAF(name) \
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_TEXT_SECTION_NAMED(name); \
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.globl name; \
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.balign 4; \
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.ent name; \
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name:
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/* Static/Local leaf function. */
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#define SLEAF(name) \
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_TEXT_SECTION_NAMED(name); \
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.balign 4; \
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.ent name; \
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name:
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/* Weak leaf function. */
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#define WLEAF(name) \
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_TEXT_SECTION_NAMED(name); \
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.weakext name; \
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.balign 4; \
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.ent name; \
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name:
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/* Weak alias leaf function. */
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#define ALEAF(name,alias) \
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_TEXT_SECTION_NAMED(name); \
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.weakext alias,name; \
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.balign 4; \
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.ent name; \
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name:
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/*
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* Alternative function entrypoints.
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*/
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/* Global alternative entrypoint. */
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#define AENT(name) \
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.globl name; \
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.balign 4; \
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.aent name; \
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name:
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#define XLEAF(name) AENT(name)
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/* Local/static alternative entrypoint. */
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#define SAENT(name) \
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.balign 4; \
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.aent name; \
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name:
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#define SXLEAF(name) SAENT(name)
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/*
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* Leaf functions declarations.
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*/
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/* Global nested function. */
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#define NESTED(name, framesz, rareg) \
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_TEXT_SECTION_NAMED(name); \
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.globl name; \
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.balign 4; \
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.ent name; \
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.frame sp, framesz, rareg; \
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name:
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/* Static/Local nested function. */
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#define SNESTED(name, framesz, rareg) \
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_TEXT_SECTION_NAMED(name); \
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.balign 4; \
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.ent name; \
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.frame sp, framesz, rareg; \
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name:
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/* Weak nested function. */
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#define WNESTED(name, framesz, rareg) \
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_TEXT_SECTION_NAMED(name); \
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.weakext name; \
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.balign 4; \
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.ent name; \
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.frame sp, framesz, rareg; \
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name:
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/* Weak alias nested function. */
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#define ANESTED(name, alias, framesz, rareg) \
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_TEXT_SECTION_NAMED(name); \
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.weakext alias, name; \
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.balign 4; \
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.ent name; \
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.frame sp, framesz, rareg; \
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name:
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/*
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* Function termination
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*/
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#define END(name) \
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.size name,.-name; \
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.end name; \
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.popsection
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#define SEND(name) END(name)
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#define WEND(name) END(name)
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#define AEND(name,alias) END(name)
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/*
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* Global data declaration.
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*/
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#define EXPORT(name) \
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.globl name; \
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.type name,@object; \
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name:
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/*
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* Global data declaration with size.
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*/
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#define EXPORTS(name,sz) \
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.globl name; \
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.type name,@object; \
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.size name,sz; \
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name:
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/*
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* Weak data declaration with size.
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*/
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#define WEXPORT(name,sz) \
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.weakext name; \
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.type name,@object; \
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.size name,sz; \
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name:
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/*
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* Global data reference with size.
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*/
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#define IMPORT(name, size) \
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.extern name,size
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/*
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* Global zeroed data.
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*/
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#define BSS(name,size) \
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.type name,@object; \
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.comm name,size
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/*
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* Local zeroed data.
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*/
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#define LBSS(name,size) \
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.lcomm name,size
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/*
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* Insert call to _mcount if profiling.
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*/
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#ifdef __PROFILING__
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#define _MCOUNT \
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.set push; \
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.set noat; \
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move $1,$31; \
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jal _mcount; \
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.set pop
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#else
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#define _MCOUNT
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#endif
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#endif
core
sysclib
src
newlib
libc
machine
mips
machine
asm.h
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