sdk-core v2026.11.05
PS2 SDK - core tier (build-critical EE/IOP modules)
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speedregs.h
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1/*
2# _____ ___ ____ ___ ____
3# ____| | ____| | | |____|
4# | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
5#-----------------------------------------------------------------------
6# Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
7# Licenced under Academic Free License version 2.0
8# Review ps2sdk README & LICENSE files for further details.
9*/
10
16
17#ifndef __SPEEDREGS_H__
18#define __SPEEDREGS_H__
19
20#include <tamtypes.h>
21
22#ifdef _EE
23#define SPD_REGBASE 0xb4000000
24#else
25#define SPD_REGBASE 0xb0000000
26#endif
27
28#define USE_SPD_REGS volatile u8 *spd_regbase = (volatile u8 *)SPD_REGBASE
29
30#define SPD_REG8(offset) (*(volatile u8 *)(spd_regbase + (offset)))
31#define SPD_REG16(offset) (*(volatile u16 *)(spd_regbase + (offset)))
32#define SPD_REG32(offset) (*(volatile u32 *)(spd_regbase + (offset)))
33
34#define SPD_R_REV 0x00
35#define SPD_R_REV_1 0x02
36#define SPD_R_REV_3 0x04
37#define SPD_CAPS_SMAP (1 << 0)
38#define SPD_CAPS_ATA (1 << 1)
39#define SPD_CAPS_UART (1 << 3)
40#define SPD_CAPS_DVR (1 << 4)
41#define SPD_CAPS_FLASH (1 << 5)
42#define SPD_R_REV_8 0x0e
43
44#define SPD_R_DMA_CTRL 0x24
45#define SPD_R_INTR_STAT 0x28
46#define SPD_R_INTR_MASK 0x2a
47#define SPD_INTR_ATA0 (1 << 0)
48#define SPD_INTR_ATA1 (1 << 1)
49#define SPD_INTR_ATA (SPD_INTR_ATA0 | SPD_INTR_ATA1) // mask=0x0003
50// see smapregs.h for SMAP_INTR_*(TXDNV|RXDNV|TXEND|RXEND|EMAC3) // mask=0x007C
51#define SPD_INTR_DVR (1 << 9) // mask=0x0200
52#define SPD_INTR_UART (1 << 12) // mask=0x1000
53#define SPD_R_PIO_DIR 0x2c
54#define SPD_R_PIO_DATA 0x2e
56#define SPD_PP_DOUT (1 << 4)
58#define SPD_PP_DIN (1 << 5)
60#define SPD_PP_SCLK (1 << 6)
62#define SPD_PP_CSEL (1 << 7)
63/* Operation codes */
64#define SPD_PP_OP_READ 2
65#define SPD_PP_OP_WRITE 1
66#define SPD_PP_OP_EWEN 0
67#define SPD_PP_OP_EWDS 0
68
69#define SPD_R_XFR_CTRL 0x32
70#define SPD_R_IF_CTRL 0x64
71#define SPD_IF_ATA_RESET 0x80
72#define SPD_IF_DMA_ENABLE 0x04
73#define SPD_R_PIO_MODE 0x70
74#define SPD_R_MWDMA_MODE 0x72
75#define SPD_R_UDMA_MODE 0x74
76
77#endif /* __SPEEDREGS_H__ */